A fundamental problem of wafer-scale integration (WSI) is its poor yield (6 percent is assumed in the experimental section of this paper, for instance). Practical WSI devices therefore need to incorporate redundancy and fault tolerance. Only then can the potential fabrication density of WSI be fully realized.

Applications that readily lend themselves to implementation in WSI are massively fine-grained parallel architectures, an eminently suitable candidate being artificial neural networks. Multilayered perceptrons exhibit fault tolerance by virtue of the classification data being distributed over many neurons. By contrast, self-organizing maps (SOMs)--the type of artificial neural network addressed in this paper--are able to tolerate defective neuron weights due to their self-organizing ability.

Three neuron computations are necessary with SOMs, namely neuron-output, winner-take-all, and weight update. Both winner-take-all and weight update offer limited scope for parallelism and could be implemented using conventional VLSI techniques. By contrast, neuron-output is seen by the authors as being particularly well suited to fabrication in WSI form.

Two major theoretical results are derived. First, an extremely long pseudo-stable state arises because of the defective neurons. However, if the defective neurons’ stuck outputs are larger than p = ( 1 - N ^{- 3 &slash; N} ) &slash; 2 , the SOM eventually organizes itself after the pseudo-stable state. Second, the SOM is unable to organize itself if the defective neuron stuck output is less than or equal to , because a false winner is chosen, which generates disorder points much faster than the ordering speed.

The authors present results obtained using a 32-chip, 200-neuron neurocomputer, which is capable of learning in around 30 seconds (compared with approximately 40 minutes on an HP9000). The application area of interest is 8-bit, 256 × 256–pixel image compression.

These theoretical and experimental results are used to estimate the degree of fault tolerance of the SOM WSI approach, in terms of the number of neurons N and the yield Y. For example, the fault tolerance is approximately 61 percent for N = 256 and Y = 94 percent.