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Introduction to IDDQ testing
Chakravarty S., Thadikaran P., Kluwer Academic Publishers, Norwell, MA, 1997. Type: Book (9780792399452)
Date Reviewed: Feb 1 1998

Testing integrated circuits (ICs) for defects is a vexing problem that is extremely important to IC manufacturers. The most popular approach is logic testing, in which models for the existence of faults are constructed. Testers then generate test sets that they hope will detect these faults. Certain faults, called bridging faults, are difficult to model and hence difficult to detect using this method. An alternative method may be needed to find faulty ICs at more basic levels. Proponents of IDDQ testing claim that it is such a method.

Complementary metal oxide semiconductor (CMOS) ICs are the focus of this book. In the steady-state portion of a CMOS circuit’s clock period (called the quiescent period), a small current flows, designated by IDDQ. This current is measured in nano-amperes. A higher value of this current means that the IC is defective. This method of testing has been used since the development of ICs, but real interest in this method began in the 1980s and has grown explosively. Proponents claim that IDDQ testing is the only available method for the detection of dominant defects, including bridging and certain forms of open circuit defects.

This book consists of ten chapters and an appendix. In chapter 1, the authors set the stage for the subsequent chapters. In a few pages, the authors give the background on IDDQ and its use as a test parameter. Logic testing is also described, for the sake of contrast, and the comparative merits of IDDQ testing are described.

Chapter 2 goes into more detail about the cost, quality, and reliability of IDDQ testing. Empirical data are presented to support the authors’ points. Chapter 3 discusses engineering issues related to IDDQ testing, including speed of measurement, the number of measurements, and their sensitivity.

Chapter 4 describes common IC defects and how IDDQ is used to test for them. Chapter 5 discusses fault models and test sets and describes the limitations of IDDQ testing in detecting certain faults. CAD tools to support IDDQ testing are also presented.

Chapters 6 through 9 contain published algorithms and experimental results related to the evaluation, compression, and generation of IDDQ test sets and the selection of measurement points. Finally, chapter 10, by Kenneth M. Wallquist, addresses the design of on-chip current monitoring devices and the potential use of IDDQ testing in diagnosis to improve yield. An appendix contains references to more than 300 university and industry research reports.

Since one author works in academia and the other in industry, the book is a useful combination of theory and practice. Unlike many research monographs, it addresses the reality of manufacturing. The authors’ style is clear and easy to understand, and the book is well illustrated. I highly recommend it for practicing engineers.

Reviewer:  Arun Ektare Review #: CR121355 (9802-0003)
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